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基于FPGA的宽带高频渔用声呐设计优化与实现

The design optimization and implementation of broadband high-frequency fishing sonar based on FPGA

  • 摘要: 针对宽带高频声呐资源消耗量过大、硬件成本较高等问题,文章提出了一种基于现场可编程门阵列接收链路的优化方法。该方法首先对模数转换信号进行脉冲压缩,并对滤波器系数进行了加窗处理,然后将信号进行下混频处理,之后进行简易求模的方式进行包络处理,从而有效减少了资源消耗。仿真结果表明,在不损失性能的前提下,优化后接收链路的信号处理方法相比优化前的块状随机存取存储器资源消耗减少约86%,乘法器资源消耗减少约80%。消声水池试验结果表明,该方法在2 m量程时可以分辨间距3 cm的两个物体。以该研究方法实现的声呐可应用于中国核电致灾生物预警、浅水域资源探测以及养殖网箱的生物监测等,具有重要的应用价值。

     

    Abstract: An field programmable gate array (FPGA)-based method for optimizing the receiver is proposed to address the problems of excessive resource consumption and high hardware cost of wideband high-frequency sonar. The method starts by pulse-compressing the analog-to-digital converted signal and windowing the filter coefficients, followed by down-mixing the signal and then simple modulus solving for envelope processing to achieve the reduction in resource consumption. Simulation results show that the signal processing method of the optimized receiver reduces the block random access memory (BRAM) resource consumption by about 86% and the Multiplier (MULT) resource consumption by about 80% compared to the pre-optimized BRAM, without any loss in performance. The results of the anechoic pool test show that this method can achieve a distance resolution of 3 cm at a range of 2 m. The sonar realized by this research method can be applied to early warning of disaster-causing organisms in China's nuclear power generation, detection of resources in shallow waters, and bio-monitoring of aquaculture nets, etc., which is of great application value.

     

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