Abstract: Sound source localization systems have long struggled with issues of low accuracy and poor real-time performance. To address these challenges, this paper proposes a hardware-software co-design method that enables the sound source localization algorithm to be applied in low-power embedded scenarios. Specifically, this paper focuses on optimizing the steered response power phase transform (SRP-PHAT), a sound source localization algorithm with high localization accuracy but high computational complexity. By introducing the method of search space contraction, this paper proposes the search space contraction steered response power phase transform (SSC-SRP-PHAT) for sound source localization. This paper first establishes the hardware-software collaboration framework. Vivado HLS is used to design and package the hardware accelerator IP core, fully leveraging the high parallelism of FPGAs. In addition, a corresponding software driver is developed to handle data preprocessing, data control, IP core driving, and operation timing. Finally, a hardware-software collaborative sound source localization system is implemented on the Zynq UltraScale+ MPSoC XCZU7EV hardware platform. Experimental results show that the system achieves a real-time positioning resolution of 5° with an overall power consumption of 4.55 W, meeting the goals of real-time and low-power operation.